1. Field of the Invention
The present invention relates generally to a flash cell and a forming process thereof, and more specifically to a flash cell and a forming process thereof including rounding selective gates.
2. Description of the Prior Art
Microprocessor systems are able to handle data and arrange information and have become an important asset in information development of the highly developed modern information society. One of the most important structures in each kind of microprocessor system is the memory used to store digital data and to provide stored data for microprocessor systems. A flash memory or an EEPROM (electrically erasable programmable read only memory), thanks to electron operation, is able to store data in a non-volatile way and to read the stored data quickly and efficiently, unlike optical or magnetic storage media (such as discs or optical discs). Therefore, flash memories with light volumes and convenient and efficient operations have been utilized widely in various microprocessor systems, such as application chip systems, mobile phones, personal digital assistants, personal computers, digital cameras, etc.
A flash memory consists of MOS transistors with a floating gate, each serving as a memory cell for recording a bit data. A typical memory transistor in addition to a body, a drain, a source, and a control gate similar to a typical MOS transistor, has a floating gate. The floating gate is located in an oxide layer, isolated from the body, the drain, the source, and the control gate. When storing data, proper bias voltages are required to be applied to the gate, the source, the drain, and the body so that the electrons can pass through the oxide layer and thus flow into the floating gate. A different amount of charges injected into the floating gate of the transistor corresponds to different data. For instance, if more charges are injected into the floating gate, the transistor stores a data bit“1”; on the contrary, if less charges are injected into the floating gate, the transistor stores a data bit “0”. The amount of charges injected into the floating gate will influence the threshold voltage of the transistor. The more negative charges are injected into the floating gate of the transistor, the smaller the absolute value of the threshold voltage of the transistor is. Under the circumstance of keeping the control voltage applied on the control gate, the more negative charge there is within the floating gate, the higher the conduct performance associated with the transistor is, so that the current between the source and drain of the transistor is greater. In other words, under the circumstance of keeping the control voltage applied on the control gate, the data bit stored in the transistor depends on the amount of conduct current in the transistor between its source and drain. While overwriting or erasing the original data stored in the memory transistor, the control gate, the body, the drain, and the source are still required to have proper bias voltages applied, causing the electrons within the floating gate to pass through the oxide layer and flow into other electrodes of the transistor.